The Designer's Guide Community
Forum
Welcome, Guest. Please Login or Register. Please follow the Forum guidelines.
Aug 1st, 2021, 9:58pm
Pages: 1
Send Topic Print
pre driver design technique for CML Driver (Read 7675 times)
DP_Design
New Member
*
Offline



Posts: 9
Seoul.Korea
pre driver design technique for CML Driver
Mar 28th, 2012, 7:39pm
 
I am designing PMOS CML Driver for 3.3Gbps and output swing is about 300mV with gnd-terminated 50ohm at TX and gnd-terminated 50ohm at RX.

The driver output swing can be small, but while designing pre-driver,
I found pre-driver output swing should be much higher than that of driver,
Of course, the Pre-driver is also PMOS CML buffer with gnd-terminated R.
And I found the output of pre-driver waveform had a lot of H/L skew because the fall-time is dependent on the R while rise-time is dependent on PMOS. But I can't decrease R because to get proper pre-driver swing decreasing R means pre-driver bias current should be increased.

So I am stuck at this problem.

Please let me know design technique of CML pre-driver if possible.

Thank U.
Back to top
 
 
View Profile DP_Design   IP Logged
raja.cedt
Senior Fellow
******
Offline



Posts: 1516
Germany
Re: pre driver design technique for CML Driver
Reply #1 - Mar 29th, 2012, 2:33am
 
why don't you post schematic???
Back to top
 
 
View Profile WWW raja.sekhar86   IP Logged
DP_Design
New Member
*
Offline



Posts: 9
Seoul.Korea
Re: pre driver design technique for CML Driver
Reply #2 - Mar 30th, 2012, 12:50am
 
I attach my driver.
To get proper predriver output swing from 0 to about 700mV at Vdd 1.2V,
I use R1~400ohm , and Pre-driver output P/N cross point is about 400mV.

I want to know how pre-driver output waveform is and what is alternatives of big R or more current to get proper pre-driver swing,
and what is the proper pre-driver swing for this design.

Thank you for your attention.
Back to top
 

pCML_Driver.jpg
View Profile DP_Design   IP Logged
loose-electron
Senior Fellow
******
Offline

Best Design Tool =
Capable Designers

Posts: 1638
San Diego California
Re: pre driver design technique for CML Driver
Reply #3 - Mar 30th, 2012, 2:52pm
 
Get rid of the resistor pull downs in the predriver and go to a nmos down and pmos up predrive system

You may need to investigate clock boosting techniques in the predriver to cleanly get the output device driven to triode.
Back to top
 
 

Jerry Twomey
www.effectiveelectrons.com
Read My Electronic Design Column Here
Contract IC-PCB-System Design - Analog, Mixed Signal, RF & Medical
View Profile WWW   IP Logged
DP_Design
New Member
*
Offline



Posts: 9
Seoul.Korea
Re: pre driver design technique for CML Driver
Reply #4 - Apr 1st, 2012, 7:13pm
 
Thanks loose-electron.

You suggested that the pre-driver should be CMOS inverter-type and it would be better to use clk boosting scheme. Am I right?
But, I heard "to make jitter and skew smaller, use identical buffer of even number" so, I made pre-driver CML.

Is it ok to use CMOS pre-driver of CML driver?
And if the output swing of Pre-driver is full swing,
then I think Data dependent jitter or H/L skew of Driver would be bigger.
Back to top
 
 
View Profile DP_Design   IP Logged
loose-electron
Senior Fellow
******
Offline

Best Design Tool =
Capable Designers

Posts: 1638
San Diego California
Re: pre driver design technique for CML Driver
Reply #5 - Apr 3rd, 2012, 9:47am
 
This is on the transmit side, consequently you are worried most about the driver characteristics and power efficiency. Using a class B driver makes more sense.
Back to top
 
 

Jerry Twomey
www.effectiveelectrons.com
Read My Electronic Design Column Here
Contract IC-PCB-System Design - Analog, Mixed Signal, RF & Medical
View Profile WWW   IP Logged
Pages: 1
Send Topic Print
Copyright 2002-2021 Designer’s Guide Consulting, Inc. Designer’s Guide® is a registered trademark of Designer’s Guide Consulting, Inc. All rights reserved. Send comments or questions to editor@designers-guide.org. Consider submitting a paper or model.