Hi cheap_salary,
cheap_salary wrote on Sep 15th, 2014, 8:33am:I can't believe bitwidth of accumulator is 4bits, it's too small.
Thank you, I changed to 12bit accumulator for SDM.
cheap_salary wrote on Sep 15th, 2014, 8:33am:Simply you are wrong in decoding din<2:0> to decimal number using ideal DAC. Your decoding output decimal codes are only positive.
I also modify ideal 3bit DAC (max voltage 4V, min voltage -3, threshold 1), however, it does not decode signed binary to decimal like MASH 111, it just changes 000 -> -3 and 111 -> 4. Therefore, I used (3bit full adder, 3bit full subtractor, 5 AND gate and 1 inverter) to change 3bit two's complement binary to 3bit simple binary, like (101 -> 000, 110 -> 001,..., 100 -> 111), and use the 3bit ideal DAC to decode to decimal number.
Do you think this is bad ideal ? I think it is complex and consume much power. Because the 3bit full adder and subtractor is not ideal, I think they will effect to SDM.
Do you think the problem in decoding to decimal is ideal 3bit DAC or I must use external components such as logic gates?
cheap_salary wrote on Sep 15th, 2014, 8:33am:Output codes as decimal number are {-3, -2, 1, 0, 1, 2, 3, 4} in MASH-111.
Usually these require 4 bits as output.
Do you mean that mapping 3bit SDM output into 4bit binary before decode to decimal in ideal DAC?
Thanks,
Irisaru