aaron_do
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Hi all,
I am trying to port the design of a ring oscillator over from 65nm technology to 40nm technology, and I've run into a road block. I ran a noise simulation on a diode connected MOSFET (same size in both processes) with a fixed DC current flowing through both, and checked the noise voltage at the drain node. I noticed that for the 40 nm technology, the noise performance is about 3-4 times worse across the spectrum. Both technologies are from the same fab house, and I have tried several different transistors (lvt, nominal vt, dnw, IO) and all show a huge degradation in noise performance. I have also checked the gm of the devices and they are very close (within around 1%).
Does anybody know if this is a real effect?
thanks, Aaron
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