I am not an expert in this field, but with over sizing the switch you will reduce the R but you will not solve signal dependent resister which impact linearity.

Please have a look on this video, well treatment!!!

http://nptel.iitm.ac.in/courses/117106034/7
http://nptel.iitm.ac.in/courses/117106034/8

Thanks,
Raj.

Aaron,

Whether a switch is sufficient on its own or not depends on the input common mode and swing (depending on the CM, you'd use NMOS, PMOS, or CMOS).

However, if your swing is large enough, simply sizing up your switch won't be enough for 14+bits and for moderate input frequencies, because the transistor capacitance also increases.  Hence, eventually, your RC delay (which is what matters) converges to a constant.

Bootstrapping is an easy solution to all this.

-- L

Aaron,

OK, I had assumed you were bottom-plate sampling.  

Here are several things you will need to check:

1 - If you decrease the sample rate (for the same input frequency), does the performance improve?  If it does, then this tells you that the bootstrap circuit is taking time to charge up (and cutting down the track time).
2 - If you decrease the input frequency for the same sample frequency, does the performance improve?  If it does, then one possible reason is the phase delay of the bootstrapped signal at the gate as compared to the source / drain.
3 - How much does the bootstrapped voltage drop when the TH goes from hold to track (due to the parasitic caps)?

Finally, note that the on resistance is inversely proportional to VGS-VT.  Bootstrapping holds VGS constant.  VT is still nonlinear.  If you can control the body in your process, then you will need to make VSB = 0 during track mode.

By the way, dummy transistors won't work for the linearity you are targeting.

-- L