Hi boe and carlgrace,
Quote:don't forget the following spikes...
I didn't get that. Could you elaborate? thanks
Quote:But believe if you don't put any at all you'll be sorry! If you can't (or don't want to) put enough capacitance on the chip, go for method b.
my reference will be VDD and GND, but what I wanted to do was feed them in through separate bondwires. I re-did my simulations/calculations, and found that I need around 40 nF of capacitance. I assume the problem you are implying is that the huge voltage spikes will couple to nearby lines etc. So that means that there's a tradeoff between the voltage spike, and how fast I can run my circuit.
I've included my simulation in the next two posts. Basically the current pulse is adding 1pC of charge each cycle, and I'm seeing what is the effect of different capacitor sizes from 10 pF to 10 nF in a logarithmic sweep. The resistor is sized so that the damping factor is always equal to 1. You can see that the 10 pF cap settles the fastest, and takes roughly 1 ns. Its not obvious, but for the 1 nF capacitor, in 1 ns, the reference only settles to about 9.3-bit accuracy.
Perhaps as you say a buffer is the best option.
thanks for the help,
Aaron