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mosfet stress of vbs (Read 3676 times)
baohulu
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mosfet stress of vbs
Mar 12th, 2014, 11:28pm
 
hi, all
 in tsmc 40nm pdk model, I find its stress requirement. it is attached below.
 my question is why "vbs" is limited to +/- 1.2*Vdd.
 vbs is a pn junction , so it can hold high reverse biased voltage, right???
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HAMP98TBUEAY7AWZ06ZT.jpg
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Geoffrey_Coram
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Re: mosfet stress of vbs
Reply #1 - Mar 24th, 2014, 12:34pm
 
You should be careful about posting confidential information on a public forum; it's best not to identify the exact foundry and process node (a pdk for a fine-line cmos process at a large foundry ...).
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Geoffrey_Coram
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Re: mosfet stress of vbs
Reply #2 - Mar 24th, 2014, 12:36pm
 
The picture you posted looks to talk about model validity, not stress limits. Generally, foundries don't want to guarantee model accuracy over ranges where they have not measured.
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