aaron_do
|
Hi,
check out this work.
Kapusta, R. ; Analog Devices, Inc, et. Al., "A 14b 80 MS/s SAR ADC With 73.6 dB SNDR in 65 nm CMOS" JSSC vol. 48, no.12.
It seems that if you have a fast enough process, a SAR is doable. Also, if the design is doable using a SAR, then go with a SAR, but if the speed requirement can't be met, then pipeline. Perhaps the experts could weigh in on the pros and cons of pipeline versus SAR as I'm also very interested. My understanding:
FOR SAR 1) Only 1 linear node. 2) Lower power due to no high gain amplifiers. 3) More scalable and benefits more from technology scaling. 4) Easier to do with just one low-voltage supply.
FOR Pipelined 1) Faster. 2) In SAR, internal clock rate is N times higher than pipelined ADC.
Anybody care to add to that?
cheers, Aaron
|