I'm working that problem right now with a 12b. The ADC is much easier to calibrate digitally if you use redundancy since you can force the ADC to take two paths and then apply digital correction to make the two paths give the same result.
Redundancy is awesome
. For example, doing a 12 bit conversion with 15 comparisons can (if done correctly) allow very large errors for all but the last two comparisons. Therefore,
1) Your reference doesn't have to settle completely,
2) Your comparator can be very noisy and simple (i.e. fast latch), and
3) Offset differences between stages isn't important so you can use a fast latch for each of the stage
But remember these don't apply to your last two comparisons - they need a low noise comparator.
In addition, cap mismatches can be on the order of 25%, but they do have to be accounted for digitally, whereas the other errors require no digital correction.
Unfortunately, I haven't found many detailed papers to help me.
This MIT Thesis was helpful, but I didn't think he did a good job in implementing his own teachings, especially his weightings. Lui, "A 12-bit 45-MS/s, 3-mW Redundant...", JSSC, Nov 2011 was also a good read. Be sure and look at their references.
I had to derive my own calibration procedure since I couldn't find a published one, but the papers describe in general terms how it needs to be done.