Kamela,

  For settling time, the question is relatively straightforward. In your
application what is the largest positive step, what is the largest negative
step that the amplifier needs to perform. From here it get a little
complex since there are many ways to define settling, again use
definition that suits your application. That is when designing a
commodity op-amp and designing an op-amp for a pipeline ADC
what the circuit needs to do is different so the measurement may
details may change.

you might measure settling time to an absolute value, settles to
within +/- 1mV in xx nanoseconds or as percent of full scale, settles
to within +/- 0.1% in yy nanoseconds. For ADC designers, %
of full scale is easier to convert into lsbs. For commodity products
mV may be fine.

So
1) use a pulse source and apply a step that will drive the output
   from a maximum (minimum) to a minimum (maximum)
   value
2) reference point is the zero crossing time of the input
3) Measure when the output settles to within a region you have
   defined as settled: mV, %, ...
4) Take the difference between #3 and #2, this is the settling time

Don't understand the load cap question, since you have not mentioned
assuming that you actually have a transconductance amplifier, no
output buffer. In real world you will always have load capacitance
so it needs to be considered separately from the capacitors that
determine the gain, i.e., you need to include both

                                                                     Sheldon