federico.butti
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Hello,
I would like to ask to experts what is the best practice to quantify the jitter of a VCO driving a squarer and an inverter delay line. When I simulate a VCO, I usually calculate phase noise, and calculate the square root of 2 times the integral up to fosc/2, then I divide the results by 2PIfosc. This is the absolute jitter as defined by most literature.
When I simulate an inverter delay line, I usually use the PNOISE JITTER simulation, given that it computes the noise sampled at a given threshold, and then the integrated result is divided by the slope at the threshold. If I perform the phase noise calculation on the same driven circuits, results are not the same. I am not sure why.
Here comes the question: what is the best practice when I simulate an autonomous circuit (VCO) loaded with a delay line (driven circuit)? Phase noise integral or PNOISE jitter at the delay line output? Or simulating each one and then summing up jitter variances quadratically?
Thanks for the replies!
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