Hello,
I am working on a bang-bang CDR. There is one thing that's bothering me a lot. How to check for stability of this CDR, as bang-bang PD is a non-linear element. I read this paper by Ken
"Analysis and Modeling of Bang-Bang Clock and Data Recovery Circuits"
I can understand the approximate expressions for Jitter Transfer Function, Jitter Tolerance etc. but I couldn't find out how to actually check for the stability of this CDR loop. Since this is a non-linear element, how would we define the damping factor or closed loop poles or phase margin in such systems?
I will be really happy if someone could tell me how to check for stability (or design for good phase margin) in a bang-bang CDR. Thanks in advance.