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How to reduce/eliminate PSS convergence errors? (Read 1655 times)
iVenky
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How to reduce/eliminate PSS convergence errors?
Apr 09th, 2016, 3:24pm
 
Hi,

I am running PSS on Cadence Virtuoso for a wide-range Quadrature VCO. I am facing convergence issues sometimes. Sometimes it works. Do you know the reason behind these convergence issues and how to reduce/solve those?
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ULPAnalog
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Re: How to reduce/eliminate PSS convergence errors?
Reply #1 - Apr 9th, 2016, 3:51pm
 
Increasing tstab, adding cmin helps convergence. Also if you are using verilog A models, they should not contain hidden states. A more general discussion on convergence issues can be found here
http://www.designers-guide.org/Forum/YaBB.pl?num=1208694646/1#1
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