You can write that equation exactly in Verilog-A, if your simulator supports it. There are also some simulators that allow you to specify expressions for dependent sources, though I'm not sure if you can use time in those expressions.
Code:`include "disciplines.vams"
module myfilter(in, out);
inout in, out;
electrical in, out;
parameter real alpha = 1;
parameter real beta = 1;
analog begin
V(out) <+ V(in) * (1 - exp(-pow($abstime/alpha, beta)))
end
endmodule