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Phase Noise and Jitter Measurements
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question on phase-domain phase detector noise model (Read 2952 times)
tulip
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Posts: 41
question on phase-domain phase detector noise model
Jan 24
th
, 2018, 10:01pm
Hello,
I have read paper "Predicting the Phase Noise of PLL-Based Frequency Synthesizers" , and use the verilogA model descried in the paper to calculate phase noise of PLL. The paper is very useful.
I have a question on phase-domain phase detector noise model listed in this paper,the phase-domain model of the synthesizer from the paper(P8, Figure4) is show below.
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phase_domain_model_of_synthesizer.png
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tulip
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Re: question on phase-domain phase detector noise model
Reply #1 -
Jan 24
th
, 2018, 10:17pm
in p17. LISTING 6, phase-domain phase detector noise model, I(out)<+-gain*Theta(pin,nin)/(2*`M_PI), there is a minus sign before gain, I think there should not be a minus sign before gain, am I right?
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phase_domain_phase_detecor_noise_model.png
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Ken Kundert
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Silicon Valley
Re: question on phase-domain phase detector noise model
Reply #2 -
Jan 24
th
, 2018, 11:18pm
In Verilog-A a positive current on
out
would flow into the charge pump. The formula computes the current leaving the charge pump. Hence the sigh inversion.
-Ken
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tulip
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Re: question on phase-domain phase detector noise model
Reply #3 -
Jan 26
th
, 2018, 12:46am
Yes, you are right, thank you very much.
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