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Mar 25th, 2023, 7:38pm
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DRC error for Nwell resistor in UMC 130 (Read 801 times)
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DRC error for Nwell resistor in UMC 130
Aug 08th, 2018, 5:46am
Hi everyone,

when i look at the layout of the pcell ,there is space between the last contact on one terminal and edge of diffusion, but when i load that instance in layout , the last contact is appearing at the edge of diffusion, DRC is giving a min space error.
i checked for NMOS and PMOS, layout is same as pcell. Did anyone face this issue before ?
i uploaded the pic below.

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