vm511
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Posts: 15
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Hi, I am trying to make an ideal model of a fully differential opamp to see the effect of a DC offset in a switched capacitor amplifier topology. In order to simulate a fully differential amplifier, I am taking two VCVS, and putting a limit on its maximum and minimum voltage in order to get the desired output voltage. Is this the correct way of emulating the constant output common mode voltage of the amplifier?
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