The Designer's Guide Community
Forum
Welcome, Guest. Please Login or Register. Please follow the Forum guidelines.
Nov 28th, 2020, 5:27am
Pages: 1
Send Topic Print
Why SPI chip select signal is active low? (Read 477 times)
neoflash
Community Fellow
*****
Offline

Mixed-Signal
Designer

Posts: 389

Why SPI chip select signal is active low?
Jan 06th, 2020, 9:04am
 
Is this an arbitrary choice or has some electrical reason behind it?

Thanks,
Neo
Back to top
 
 
View Profile   IP Logged
Frank Wiedmann
Community Fellow
*****
Offline



Posts: 671
Munich, Germany
Re: Why SPI chip select signal is active low?
Reply #1 - Jan 8th, 2020, 7:39am
 
A quick search turned up this on https://electronics.stackexchange.com/questions/7664/why-are-things-like-reset-m...:

Wikipedia says (http://en.wikipedia.org/wiki/Logic_level):

Many control signals in electronics are active-low signals (usually reset lines, chip-select lines and so on). This stems from the fact that most logic families can sink more current than they can source, so fanout and noise immunity increase. It also allows for wired-OR logic if the logic gates are open-collector/open-drain with a pull-up resistor. Examples of this are the IC bus and the Controller Area Network (CAN), and the PCI Local Bus. RS232 signaling, as used on some serial ports, uses active-low signals.
Back to top
 
 
View Profile WWW   IP Logged
Pages: 1
Send Topic Print
Copyright 2002-2020 Designer’s Guide Consulting, Inc. Designer’s Guide® is a registered trademark of Designer’s Guide Consulting, Inc. All rights reserved. Send comments or questions to editor@designers-guide.org. Consider submitting a paper or model.