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The Designer's Guide Community Forum › Simulators › Circuit Simulators › INL/DNL of DAC using Monte Carlo Statistical Simulation in Cadence Spectre
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INL/DNL of DAC using Monte Carlo Statistical Simulation in Cadence Spectre (Read 434 times)
repah
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INL/DNL of DAC using Monte Carlo Statistical Simulation in Cadence Spectre
Apr 16th, 2020, 2:56pm  
Hello,

I would like to do INL/DNL of DAC using Monte Carlo Statistical Simulation in Cadence Spectre.

Is it a matter of plotting each Monte Carlo run as I would one run ?  Then grab all the data, post-process ?

I would like to do 50 runs using the PDK mismatch parameters - ie.  See the effect of device mismatch on INL and DNL.

Thank you.
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