Thank you for your reply, Geoffery,
CKS_P<127:0:8> is valid in schematic and symbol view in virtuoso, which represent CKS_P port with 16 bits width (127, 119, 111, 103, 95, 87, 79, 71, 63, 55, 47, 39, 31, 23, 15, 7). if possible, you can draw a schematic in this way;
The problem lies exactly at the place that when i use "Create-Cellview-From Cellview" in schematic view, the virtuoso could not convert this format correctly in VA
The result of converting is "inout [127:7] CKS_P" in figure2, which has 121 bits width, and the VA check&save failed.