The Designer's Guide Community
Forum
Welcome, Guest. Please Login or Register. Please follow the Forum guidelines.
Mar 29th, 2024, 12:01am
Pages: 1
Send Topic Print
What will happen for the histogram of the ADC if the last conversion is not done (Read 460 times)
Jacki_2016
New Member
*
Offline



Posts: 4

What will happen for the histogram of the ADC if the last conversion is not done
Aug 02nd, 2022, 6:12am
 
Hello,

   My question is if the SARADC doesn't have enough time to complete the last bit conversion, what will the linearity be affected? What does the histogram look like? Could anybody give me some hints or links?
   Thank you.
Back to top
 
 
View Profile   IP Logged
smlogan
Community Member
***
Offline



Posts: 51
Boston, MA
Re: What will happen for the histogram of the ADC if the last conversion is not done
Reply #1 - Jan 15th, 2023, 10:34am
 
Dear Jacki_2016,

If I understand your question correctly, I think what you are asking is what are the consequences if an N bit ideal A/D has an accuracy limitation such that it is accurate to N - 1 bit.

Do you know if the error mechanism results in an error with a specific PDF or bias or are the errors truly random? If the probability of an error is  random, then the linearity of your N bit A/D will be no better than that for a (N-1) bit A/D. The histogram in that case, if I understand what your notion of a histogram is, will show it to be a N-1 bit quantizer in lieu of an N bit quantizer.

Does this help Jacki_2016, or did I misunderstand your question?
Shawn
Back to top
 
 

Shawn
View Profile   IP Logged
Pages: 1
Send Topic Print
Copyright 2002-2024 Designer’s Guide Consulting, Inc. Designer’s Guide® is a registered trademark of Designer’s Guide Consulting, Inc. All rights reserved. Send comments or questions to editor@designers-guide.org. Consider submitting a paper or model.