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divide by 2, then multi by 2, affect phase noise? (Read 2965 times)
apple_fandai
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divide by 2, then multi by 2, affect phase noise?
Mar 25th, 2004, 8:02am
 
Hi,

I design a PLL. If I add a divid by 2 and a multiply by 2 circuit at the output of VCO, the frequency relationship of PLL don't change. Is it harmful to phase noise of PLL? How these two circuits will affect  the phase noise of whole PLL?

Thanks!  :)
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Andrew Beckett
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Re: divide by 2, then multi by 2, affect phase noi
Reply #1 - Mar 28th, 2004, 11:23am
 
Well, unless the divider and multiplier are noiseless,
I'd have thought that was obvious?

Andrew.

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