You also might want to take another look at my reply #3 to this topic. That method does not cut the loop, so if your original circuit converges, the circuit with the PAC sources inserted should do so as well.

You can find an implementation of this method for AC analysis in LTspice (free, see http://www.linear.com/company/software.jsp) at http://groups.yahoo.com/group/LTspice/files/Examples/Educational/LoopGain_Probe/... (free registration required).

You need to determine both voltage and current gain in order to properly account for loading effects. See http://www.stanford.edu/class/ee214/handouts/h21_lecture15.pdf (and http://www.stanford.edu/class/ee214/handouts/h20_lecture14.pdf as background information) or the articles mentioned in the LTspice example.

I assume you have a pwm converter with either straight voltage mode control or current mode control. In either case, the frequency of the ramp limits your loop gain crossover frequency and the amplitude of the ramp scales the overall loop gain. Furthermore, any glitches in the ramp can cause all sorts of stability problems. Straight voltage mode control is fairly simple. The loop gain is proportional to the inverse of the amplitude of the ramp.  Current mode control is more complex because you actually have two ramps: the same ramp you have for voltage control and in addition, a current compensation ramp to stabilize the current loop. I can recommand a few papers on current compensation but I am not sure they will be easy to find because they are somewhat old:

1. R.B Ridley, "A New Small-Signal Model for Current-Mode Control". Power Conversion and Intelligent Motion Conference proceedings, Oct. 16-19, 1989.

2. R.D. Middlebrook, "Topics in Multiple-Loop Regulators and Current-Mode Programming. IEEE Power Electronics Specialists Conference proceedings, June 26-29, 1989.

3. R.D. Middlebrook and S. Cuk. "Advances in Switched-mode Power Conversion". TESLAco.

You should find a wealth of papers on current mode control in the archives of the IEEE power electronics specialists conference.  I suspect most papers will be at least 10 years old.

As I re-read your question, it occurs to me that perhaps you are asking about circuit design, not systems design. There are many ways to generate a ramp. Most power control chips generate it internally. If you are designing the ramp circuitry yourself, you could try texts such as
Millman and Taub, "Pulse, digital, and switching waveforms". McGraw Hill. This is an older text based on bipolar transistors. Something similar for newer technologies may exist. The main thing to worry about is keeping the ramp clean. As I said before, any imperfection in the ramp will adversely affect performance.

[quote author=richard88  link=1102534266/15#19 date=1105308316]Anyway, it seems that the spectre still couldn't resolve to converge to a solution, error prompt : Zero diagonal found in Jacobian at `xextfet.8' and `xextfet.8'.
[/quote]
Does your circuit converge without the additional PAC source? If so, you might want to contact Cadence support because that would seem like a bug to me.

jws : Yes, I used PSS & PAC for analysis.

FInally, I have some results but I have to set the PSS option to traponly for the integration method instead of gear2only (usually this is recommended right ?)
Can anyone explain why traponly works in this case ?
Thanks.

Hi,Richard88
   you can adjust several other parameters for pss.
Would you give me a copy of you netlist. I can try it for
you. If the pac loop gain you got is the same as the LTspice.

Jws,

I have always wanted to apply SpectreRF to power electronics but never had the chance to complete the job. I was more or less dragged kicking and screaming from power electronics into RF. I've done state space averaging and used SpectreRF (for RF circuits). I expect SpectreRF to be more accurate than state space averaging. I would not be surprised if SpectreRF could simulate the closed loop response to glitches in the voltage and/or current compensation ramps if one could model the sneak path accurately. However, I do not think SpectreRF makes state space averaging obsolete. Unlike SpectreRF, state space averaging can give you closed form expressions for all the transfer functions of interest. Such closed form expressions can give the designer insight that can save him/her hundreds of SpectreRF simulations. Also, if you want to simulate high level control functions you may want to add VerilogA models that have hidden state. Last I heard, SpectreRF can't handle hidden state. I would use state space average models during the early phases of the design then check the design with SpectreRF. I would also use SpectreRF for bottom up analysis. In short, SpectreRF should be more accurate than state space averaging but I absolutely do not consider it a replacement for state space averaging.