hi,guys
   our company used the charter 0.35um RF CMOS process, and get the PDK and pcells from Cadence. now, when we serie or parallel resistors in the schematic, then do the same way in layout, extracted, run LVS, it comes out some error:"combined device:Err:Sch Res missing params: l ; lay Res missing params: l
  anyguys can tell me why would suffer this problem and how to solve it.