Jess Chen
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I could list a bunch of references for you but most of them are out of print. I think your best bet is to pick up a book like Voperian's book (listed above) and check out pages 440-459. There are other books but again, like many of the original papers, they are probably out of print. Voperian's book is fairly recent. There may be other recent books on the subject.
I do not have time to write out a detailed procedure, especially since I have not seen your schematic, but I can outline how I would attack the problem. Your analysis will most likely proceed in three steps:
1. Replace the switching elements with state space averaged models, usually DC/DC transformers. These can be easily implemented in VerilogA. If your inductor is always in continuous or discontinuous mode conduction, you can use a fairly simple model. If you want your model to be capable of switching conduction modes, your model will be more complicated. Be sure to include the input filter and any common mode EMI filters your system may have. There is another discussion in this section of the Forum where I give a few more details on state space averaging.
2. Based on your control (current mode control in your case), derive an expression for the duty cycle in terms of the input voltage, output current, output voltage, stabilizing ramp, and error amplifier voltage. You should be able to implement the control law in VerilogA too.
3. Identify and analyze the loops of interest. Current mode control involves multiple feedback loops. If you want to break all feedback loops, split the duty cycle node. You can assess the loops one at a time as long as you leave the loops closed for the next loop and keep track of closed loop right half plane poles. This procedure is called sequential loop closures or the sequential return difference method. I can give you references on the procedure but I must warn you that they are probably fairly obscure. Another approach is to compute the closed loop poles directly using Spectre's pz analysis. However, you will definitely want to check your results. The last time I used that feature, it gave a lot of extra poles and zeros. That is why I would probably use the sequential return difference method. If you are certain the inner loops are stable, you can leave those closed and concentrate on the outer loop, which is probably a voltage loop. In general, you should check your stability analysis against a step or impulse response. For AC stability analysis of one loop, I usually break the loop by inserting a zero voltage DC voltage source in the loop of interest, at a point where the upstream impedance (the source impedance), is much smaller than the downstream impedance (load impedance). There is a new Spectre feature called "stability analysis" that does not have such an impedance requirement. I tried it once and it seemed to work fine. However, in a multiloop system, you may have to resort to the large LC trick to break the loops that have not yet been analyzed without affecting the DC operating point.
I apologize if my response is too short but that's all I have time for right now. Please let me know what parts are unclear and I will elaborate on them later.
-Jess
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