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bernd Senior Member Offline Posts: 229 Munich/Germany	Re: UltraSim simulation failed Reply #15 - Nov 21^st, 2006, 2:20am Because AMS Designer is a so called 'single kernel' or 'single process' mixed signal simulator. Means there is no coupled simulation and separate netlisting as used for e.g.the ' old method' Spectre-Verlog XL simulations. So ncsim is the only process but it uses the chosen analog solver method under the hood. Bernd
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Pavel

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Lausanne/Switzerland

Re: UltraSim simulation failed
Reply #16 - Nov 21^st, 2006, 3:08am

So, I have no possibility to be sure that UltraSim really run.
I thought that there is some sort of high-level shell "AMS Smulator" that calls
either ncsim (for verilog/VHDL) either UltraSim for transistor-level netlists.
So I hoped to see ncsim and UltraSim sharing CPU, in other words I hoped to see in
prstat list x1 time ncsim, then x2 time UltraSim, etc...

Another question - where can I find some sort of benchmarkig of UltraSim performance
I mean such shema (number of gates/transistors) + such stop time correspond to such simulation time.
Why this question - I hoped that UltraSim is more rapid. Before run the simulation I set the most "rapid" settings.

Regards.

Pavel.

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bernd

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Posts: 229
Munich/Germany

Re: UltraSim simulation failed
Reply #17 - Nov 21^st, 2006, 6:05am

Quote:

So, I have no possibility to be sure that UltraSim really run.

There is an elaborator option which indicates that
the analog solver is UltraSim and which should be
visible in the ncelab log file 'ncelab -amsfastspice',
then trust the tool.
Quote:

Another question - where can I find some sort of benchmarkig of UltraSim performance
I mean such shema (number of gates/transistors) + such stop time correspond to such simulation time.
Why this question - I hoped that UltraSim is more rapid. Before run the simulation I set the most "rapid" settings.

UltraSim Simulator User Guide, Simulation Options, located in
<your_install_dir>/doc/UltraSim_User/UltraSim_User.pdf .
Where <your_install_dir> is the root path to either your DFII or
MMSIM installation tree.
You can set the the simulation options through the Hierarchy Editor,
"View -> Properties".

Bernd

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Pavel

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Posts: 174
Lausanne/Switzerland

Re: UltraSim simulation failed
Reply #18 - Nov 21^st, 2006, 7:14am

Thank you Bernd for assistance

Quote:

There is an elaborator option which indicates that
the analog solver is UltraSim and which should be
visible in the ncelab log file 'ncelab -amsfastspice',
then trust the tool.

I didn't perfectly understand what you mean.
I choose UltraSim as Analog Solver in AMS Options/Simulator.
What I see in ncelab.lab is:
ncelab: 05.50-s008: (c) Copyright 1995-2005 Cadence Design Systems, Inc.
NETZ0115 ), .RDB( _rd ), .DOUT_en( NETZ5 ), .Drive( drive ), .DIN( din ),
|
ncelab: *W,CSINFI (../90131BA_DIGITAL/TB_0/schematic/verilog.vams,37|39): implicit wire has no fanin (TB_0.NETZ5).
ncelab: Memory Usage - 29.9M program + 47.1M data = 77.0M total
ncelab: CPU Usage - 1.3s system + 2.8s user = 4.1s total (6.5s, 62.6% cpu)

What means "trust the tool"

As for me, benchmarking means relative estimation of performance.
For my case I would like to know if simulation time is correct for my setup:
My setup is as follows:
1300 gates
250 flip-flops
clock1 13MHz
clock2 32kHz
stop time - 10ms
simulation time - about 3 hours
CPU - 900MHz UltraSparc
UltraSim options - the most rapid

What does MMSIM mean.

Regards.

Pavel.

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