Hi neoflash,

Is that the PLL for transmitter or receiver?

I remember that the jitter tolorence is defined in the XAUI spec, from which the PLL bandwidth can be derived. Please refer the IEEE 802 standard for the physical layer of XAUI.


Yawei

Hi neoflash,

The jitter tolerance is implicitly or explicitly defined the standard. Sure the jitter generation should be smaller than the jitter tolerance to ensure the proper data transmission. So it defined the TX PLL bandwidth implicitly.

Another method is to reduce the total jitter to meet the eye-diagram mask. However, I am not clear the relation between the bandwidth and the total jitter. That is quite complex. Perhaps the random jitter (rms jitter) can be deduced from the integral phase noise, which strongly depends on the TX PLL bandwidth. However, periodic jitter, ISI, and duty cycle distortion add to the total jitter. Those factors are independent of TX PLL bandwidth.

I hope the reply is helpful.


Yawei