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PLL phase diognosis? (Read 7820 times)
liletian
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PLL phase diognosis?
May 04th, 2009, 9:02am
 
 Hi guys
 The attached pic is a ring oscillator PLL, the spectrum has some lines which I assume which comes from ring oscillator? Any suggestion on origination and how to purified it? Any suggestion will be appreciated!
 Thanks
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PLL.png
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pancho_hideboo
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Re: PLL phase diognosis?
Reply #1 - May 4th, 2009, 9:09am
 
Why do you set RBW=VBW=8MHz ? It is very wide.

liletian wrote on May 4th, 2009, 9:02am:
The attached pic is a ring oscillator PLL, the spectrum has some lines which I assume which comes from ring oscillator?

I can't observe remarkable spurious spectrum lines.
Floor spectrums are very dirty.
Maybe this is due to your measurement conditions, such as voltage power supply.
Or this might be improper loop filter design.
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liletian
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Re: PLL phase diognosis?
Reply #2 - May 4th, 2009, 9:23am
 
pancho_hideboo wrote on May 4th, 2009, 9:09am:
Why do you set RBW=VBW=8MHz ? It is very wide.

liletian wrote on May 4th, 2009, 9:02am:
The attached pic is a ring oscillator PLL, the spectrum has some lines which I assume which comes from ring oscillator?

I can't observe remarkable spectrum lines.
Floor spectrums are very dirty.
Maybe this is due to your measurement conditions, such as voltage power supply.
Or this might be inproper loop filter design.

 the loop filter is a simple RC filter, is that the problem? I did not use active filter in here because I did not see much advantages.
 Thanks
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pancho_hideboo
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Re: PLL phase diognosis?
Reply #3 - May 4th, 2009, 9:29am
 
Why do you set RBW=VBW=8MHz ? It is very wide.

liletian wrote on May 4th, 2009, 9:23am:
the loop filter is a simple RC filter, is that the problem?
Do you determine bandwidth of loop filter by enoughly considering followings.
  - Reference frequency(Comparison Frequency)
  - Corner frequency of VCO phase noise

liletian wrote on May 4th, 2009, 9:23am:
I did not use active filter in here because I did not see much advantages.
Again see surely http://www.designers-guide.org/Forum/YaBB.pl?num=1241145270/4#4

Anyway floors of your spectrum are very high and dirty regardlerss of RBW=VBW=8MHz which are very wide.

You should consult someone who has much experience of actual RF measurements about your measurement setups and usages of instruments.
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« Last Edit: May 4th, 2009, 10:47am by pancho_hideboo »  
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liletian
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Re: PLL phase diognosis?
Reply #4 - May 5th, 2009, 7:59pm
 
pancho_hideboo wrote on May 4th, 2009, 9:29am:
Why do you set RBW=VBW=8MHz ? It is very wide.

liletian wrote on May 4th, 2009, 9:23am:
the loop filter is a simple RC filter, is that the problem?
Do you determine bandwidth of loop filter by enoughly considering followings.

  - Reference frequency(Comparison Frequency)
 I use signal generator to generator signal at 2Ghz
  - Corner frequency of VCO phase noise
 do you mean 1/f^3 noise? How could loop filter will affect affect Corner frequency and Reference frequency?
 Thank you
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Berti
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Re: PLL phase diognosis?
Reply #5 - May 6th, 2009, 3:33am
 
Hi,

I am just wondering: What's the loop filter bandwidth?

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liletian
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Re: PLL phase diognosis?
Reply #6 - May 6th, 2009, 7:45am
 
Berti wrote on May 6th, 2009, 3:33am:
Hi,

I am just wondering: What's the loop filter bandwidth?


500MHz
loop filter bandwidth is approximately equal to pll lock range, right?
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pancho_hideboo
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Re: PLL phase diognosis?
Reply #7 - May 6th, 2009, 8:45am
 
Berti wrote on May 6th, 2009, 3:33am:
I am just wondering: What's the loop filter bandwidth?
Expression of "the loop filter bandwidth" is not proper.

Correctly it should be loop bandwidth of PLL.
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« Last Edit: May 6th, 2009, 9:50am by pancho_hideboo »  
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pancho_hideboo
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Re: PLL phase diognosis?
Reply #8 - May 6th, 2009, 8:45am
 
I think default RBW is 3MHz for your Spectrum Span.
You dared change RBW from 3MHz to 8MHz.

Why do you set RBW=VBW=8MHz ? It is very wide.

liletian wrote on May 5th, 2009, 7:59pm:
I use signal generator to generator signal at 2Ghz
Can your phase comparator work in 2GHz directly ?
Do you understand "Comparison Frequency" ?

liletian wrote on May 5th, 2009, 7:59pm:
do you mean 1/f^3 noise? How could loop filter will affect affect Corner frequency and Reference frequency?
See text books on basic of PLL.

See figure-20 of http://www.designers-guide.org/Analysis/PLLnoise+jitter.pdf

You should consult someone who has much experience of actual RF measurements about your measurement setups and usages of instruments.

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Berti
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Re: PLL phase diognosis?
Reply #9 - May 7th, 2009, 12:00am
 
Hi again,

I am confused. From your spectrum, the 'loop bandwidth of the PLL' (thanks for the proper terminology!  ;) ) doesn't look like 500MHz but more like 50MHz. Furthermore the comparison frequency of 2GHz seems to be pretty high and somehow doesn't sound correct for a loop bandwidth of 500MHz.

I think it is difficult to help you with the measurements when there are even confusions on the PLL itself.

Cheers
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liletian
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Re: PLL phase diognosis?
Reply #10 - May 9th, 2009, 7:12pm
 
Berti wrote on May 7th, 2009, 12:00am:
Hi again,

I am confused. From your spectrum, the 'loop bandwidth of the PLL' (thanks for the proper terminology!  ;) ) doesn't look like 500MHz but more like 50MHz. Furthermore the comparison frequency of 2GHz seems to be pretty high and somehow doesn't sound correct for a loop bandwidth of 500MHz.

I think it is difficult to help you with the measurements when there are even confusions on the PLL itself.

Cheers

 Hi Berti
 when I mentioned it, it means the RC filter's pole location. 1/(1+w/w0). I guess you guys definition is "The
loop bandwidth is defined as the
integrated magnitude of the PLL
frequency transfer function over
the entire frequency spectrum." please let me know. Also, how can you see my PLL's loop bandwidth is less than 500MHz.
 Thank you
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Re: PLL phase diognosis?
Reply #11 - May 10th, 2009, 3:06am
 
liletian wrote on May 9th, 2009, 7:12pm:
 when I mentioned it, it means the RC filter's pole location. 1/(1+w/w0).


First question, you are really using a RC filter (one R and one C)? If that is true, what kind of phase comparison circuit are you using?

liletian wrote on May 9th, 2009, 7:12pm:
I guess you guys definition is "The loop bandwidth is defined as the
integrated magnitude of the PLL frequency transfer function over
the entire frequency spectrum." please let me know.


Yes, I think we are all talking about pll bandwidth, not the loop filter bandwidth.

liletian wrote on May 9th, 2009, 7:12pm:
Also, how can you see my PLL's loop bandwidth is less than 500MHz.


I did not check you spectrum, but first of all, if you vco is free running, no information can be seen from your meansurment. And loop bandwidth of 500MHz is very big, and if that is true, what is your comparison frequency?  If you can tell your loop filter R and C values, PFD/PD structure, kvco, maybe I can help you to figure out what might be wrong.

cheers
rfmems
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