dear all,
i want to simulate the phase margine of a voltage domain behavioral model of PLL using PSS/PSTB.
i got strange results though:
here is my schemativ annotated my components
time domain simulation works well (strobed)
![](http://img13.imageshack.us/img13/1479/im3i.png)
but when i do pss/pstb i get strange results depicted below
![](http://img220.imageshack.us/img220/7886/im2c.png)
i insert the probe between the loop filter and the vco
i don't know what's going wrong
please help me figuring out what's wrong