aaron_do
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Hi all,
I have been reading up on SAR ADCs, and typically the poorer among SFDR and SNDR is used to calculate ENOB. My understanding is that for high-resolution ADCs, linearity can be a bottle-neck. For a SAR ADC for example, the matching in the capacitor array needs to meet ENOB requirements.
Anyway, I noticed that several papers I've looked at show significantly better SFDR than SNDR. For example, a paper I just read has SFDR 72 dB and SNDR 54 dB. I'm wondering if this trend is normal, because that makes it seems like noise is the bottleneck, not linearity. One more thing, since most of these works only characterize one or two chips, do you think there are a whole bunch of un-characterized chips out there with poor SFDR?
thanks, Aaron
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