Thank you, Aaron.
Quote:What do you mean? In the real world it is still a problem. You can't put an inductor where L0 is...
In real world, L0 is not purely inductive. Therefore, there is resistance and no DC short there. This is what I thought.
Quote:It depends on your design. The capacitors should be large enough not to cause any significant performance loss. But you don't want them to take up too much area.
Yes, that is what I confused. Based in layout, I think I can estimate the upper limitation for these capacitors. However, how about lower limit? I am still not sure how to calculate it.
The larger the capacitance the smaller its reactance and the better performance.
How to know that a capacitance causes significant performance loss or not?
For example, my frequency is 1.5GHz and C = 1pF. Is that good?