Hi Andrew,

I totally understand, but could you give me an example?.

What do you recommend for define output impedance to the next model?

**Code:**// VerilogA for zamplificador, opamp_designers_guide, veriloga
`include "constants.vams"
`include "disciplines.vams"
module opamp_designers_guide(pos, neg, out);
output out;
input pos,neg;
electrical pos, neg, out;
parameter gain=10;
analog begin
V(out)<+gain*(laplace_np(V(pos,neg),{1},{-6.28e3,0,6.28e12,0}));
end
endmodule