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May 20th, 2019, 3:26pm
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how to print integer in the verilog module (Read 292 times)
liletian
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how to print integer in the verilog module
Aug 08th, 2018, 10:34am
 
Hi All

I write the following module comparator, In the testbench, I would like to monitor integer i, when I try to print out the interger using the following statement, it does not work. Is there a way to keep track of the interger in the testbench?

Thank you very much,



module comparator(stag,ptag,tag_equal);
parameter n=16;
input [n-1:0] stag,ptag;

output tag_equal;

reg tag_equal;

integer i;

// initial begin
// tag_equal<=1'b1;
// end

always @(stag or ptag)
for(i=n-1;i>=0;i=i-1)
begin: sweep
if((stag[i]^ptag[i]))
begin
tag_equal<=1'b0;
// break;

// disable sweep;
end
else tag_equal<=1'b1;
end
endmodule


module test_comparator();

parameter n=16;

reg [n-1:0] A,B;

wire tag_equal;

comparator #(n) com(.stag(A),.ptag(B),.tag_equal(tag_equal));

initial begin

$monitor($stime, " stag=%h,ptag=%h,tag_equal=%b, i=%b", A,B,tag_equal,com.i);

#10;

A=16'h000A;
B=16'h000B;

#10;
A=16'h000B;
B=16'h000B;
end // initial begin
endmodule
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Andrew Beckett
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Re: how to print integer in the verilog module
Reply #1 - Aug 9th, 2018, 4:26am
 
It works for me (using XCELIUM 18.10). I suspect that your problem is that you're only seeing the final value of i at each time - that's because the for loop increments i at the same time, with no delay - and $monitor outputs only the final value. From the IEEE 1364-2001 LRM (section 17.1):

Quote:
When a $monitor task is invoked with one or more arguments, the simulator sets up a mechanism whereby each time a variable or an expression in the argument list changes value—with the exception of the $time, $stime or $realtime system functions—the entire argument list is displayed at the end of the time step as if reported by the $display task. If two or more arguments change value at the same time, only one display is produced that shows the new values.


If (for example) I add a delay:

Code:
#1 if((stag[i]^ptag[i]))  



and then also change the final #10 to a #20 to allow sufficient time for the loop to complete, I then get:

        0 stag=xxxx,ptag=xxxx,tag_equal=x, i=xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
       10 stag=000a,ptag=000b,tag_equal=x, i=00000000000000000000000000001111
       11 stag=000a,ptag=000b,tag_equal=1, i=00000000000000000000000000001110
       12 stag=000a,ptag=000b,tag_equal=1, i=00000000000000000000000000001101
       13 stag=000a,ptag=000b,tag_equal=1, i=00000000000000000000000000001100
       14 stag=000a,ptag=000b,tag_equal=1, i=00000000000000000000000000001011
       15 stag=000a,ptag=000b,tag_equal=1, i=00000000000000000000000000001010
       16 stag=000a,ptag=000b,tag_equal=1, i=00000000000000000000000000001001
       17 stag=000a,ptag=000b,tag_equal=1, i=00000000000000000000000000001000
       18 stag=000a,ptag=000b,tag_equal=1, i=00000000000000000000000000000111
       19 stag=000a,ptag=000b,tag_equal=1, i=00000000000000000000000000000110
       20 stag=000a,ptag=000b,tag_equal=1, i=00000000000000000000000000000101
       21 stag=000a,ptag=000b,tag_equal=1, i=00000000000000000000000000000100
       22 stag=000a,ptag=000b,tag_equal=1, i=00000000000000000000000000000011
       23 stag=000a,ptag=000b,tag_equal=1, i=00000000000000000000000000000010
       24 stag=000a,ptag=000b,tag_equal=1, i=00000000000000000000000000000001
       25 stag=000a,ptag=000b,tag_equal=1, i=00000000000000000000000000000000
       26 stag=000a,ptag=000b,tag_equal=0, i=11111111111111111111111111111111
       30 stag=000b,ptag=000b,tag_equal=0, i=00000000000000000000000000001111
       31 stag=000b,ptag=000b,tag_equal=1, i=00000000000000000000000000001110
       32 stag=000b,ptag=000b,tag_equal=1, i=00000000000000000000000000001101
       33 stag=000b,ptag=000b,tag_equal=1, i=00000000000000000000000000001100
       34 stag=000b,ptag=000b,tag_equal=1, i=00000000000000000000000000001011
       35 stag=000b,ptag=000b,tag_equal=1, i=00000000000000000000000000001010
       36 stag=000b,ptag=000b,tag_equal=1, i=00000000000000000000000000001001
       37 stag=000b,ptag=000b,tag_equal=1, i=00000000000000000000000000001000
       38 stag=000b,ptag=000b,tag_equal=1, i=00000000000000000000000000000111
       39 stag=000b,ptag=000b,tag_equal=1, i=00000000000000000000000000000110
       40 stag=000b,ptag=000b,tag_equal=1, i=00000000000000000000000000000101
       41 stag=000b,ptag=000b,tag_equal=1, i=00000000000000000000000000000100
       42 stag=000b,ptag=000b,tag_equal=1, i=00000000000000000000000000000011
       43 stag=000b,ptag=000b,tag_equal=1, i=00000000000000000000000000000010
       44 stag=000b,ptag=000b,tag_equal=1, i=00000000000000000000000000000001
       45 stag=000b,ptag=000b,tag_equal=1, i=00000000000000000000000000000000
       46 stag=000b,ptag=000b,tag_equal=1, i=11111111111111111111111111111111


Regards,

Andrew.

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