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 sanforyou Junior Member Offline Posts: 17 Simple Inductor model in SystemVerilog using Cadence EEnet Oct 02nd, 2020, 12:05pm   I have a simple SV capacitor model using EEnet as shown below. This simulates with no issues when driven by 1V square wave as shown below: Code:````timescale 1ns/1ps import EE_pkg::*; module CapGeq ( P ); inout EEnet P; parameter real c=1e-9; // capacitance parameter real rs=0; // series resistance parameter real ic=0; // initial capacitor voltage at time zero parameter real tinc=10e-9; // timestep for computing voltage update (sec) bit ck; real dV,Icap,Tcap, Vout; always #(tinc*1s) ck=!ck; //toggle clock at defined rate always@(P.I,ck) begin //on input change or clock cycle; dV=Icap*(\$realtime-Tcap)/(c*1s); //voltage change is I*DT/C Icap=P.I; Tcap=\$realtime; //save new current and time Vout += dV; //update voltage end assign P='{Vout,0,0}; //drive output as ideal voltage source endmodule ```Output waveform is also attached for capacitor However I try to replicate inductor SV model using similar strategy as shown below: Code:````timescale 1ns/1ps import EE_pkg::*; import cds_rnm_pkg::*; module indGeq(P); inout EEnet P; parameter real L=50e-6; // inductunce, 50uH parameter real rs=0; // series resistance parameter real iL=0; // initial inductor voltage at time zero parameter real tinc=1e-9; // timestep for computing voltage update (sec) bit ck; real dI,Vind,Tind,Iout; //initial Vind=iL; always #(tinc*1s) ck=!ck; always @(P.V,ck) begin //on input change or clock cycle; dI=Vind*(\$realtime-Tind)/(L*1s); //current change is Vind*dt/L; Vind=P.V; //save new voltage Tind=\$realtime; //save new time Iout+=dI; //update current end assign P = '{0,Iout,0}; //drive output as ideal current source endmodule ```However, I see "Iout" and Vind both are zero all the time as shown in Inductor output waveforms. Can anyone explain why this model is not working? Back to top IP Logged
 Geoffrey_Coram Senior Fellow Offline Posts: 1994 Massachusetts, USA Re: Simple Inductor model in SystemVerilog using Cadence EEnet Reply #2 - Oct 29th, 2020, 7:44am   I have never used EEnet. Is it a Cadence-specific thing? I don't know what it means when you Code:```assign P = '{0, Iout, 0}; ```Have you tried putting in some print statements to debug? I assume Vind starts at 0, so that on the first step, dI = 0. How are you driving this model? Can you print P.V and verify that it is being driven? Back to top If at first you do succeed, STOP, raise your standards, and stop wasting your time.   IP Logged