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Dec 4th, 2020, 6:50am
1  Design / Analog Design / DAC output DC voltage shift
 on: Nov 30th, 2020, 1:35am 
Started by CMOSMas | Post by CMOSMas
Hi guys,

i'm working on a 10bit charge redistribution switched-capacitor serial DAC.
The converter works with V_ref=10mV=V_fs.
In this way, the converter starts convertingthe input from 0 to 10mV.
The problem is that i need this very small LSB=9.8uV but at the end of the conversion, the output must have 300mV DC voltage (lets say a 10mVpp sinusoidal signal with 300mV DC).
The DAC output goes to an high gain voltage buffer stage in order to drive a capacitive load.
How can i introduce the DC voltage? Level-shift after the buffer or internally within the dac?

Thank you in advance!  :)

2  Design / RF Design / Loaded quality factor of voltage control oscillator
 on: Nov 27th, 2020, 10:53pm 
Started by transign | Post by transign
Hello,

How can I calculate in virtuoso the loaded quality factor of the VCO's main tank? Is there a specific test bench that I could use? Should I add only the parasitics of active devices?

Thanks a lot!

3  Design / Mixed-Signal Design / Re: open loop VCO-Based ADC
 on: Nov 20th, 2020, 2:17pm 
Started by zahramoh | Post by polyam
Think about noise shaping spectrum and the way you cut the noise power with the decimation filter. It will give you the answer on the SNDR improvement. Technically you can push the BW of your decimation filter towards the lower frequency and have a better SNDR. SNDR anyways is limited to the input thermal noise of your ADC and also probably the phase noise of your VCO. The other thing is you should not compare the output of your ADC with /without decimation filter. Technically speaking the output of your ADC is the output of the decimation filter and you have to compare it with your input. Note that in the oversampled noise shaping ADC, the whole package (modulator followed by the decimation filter) is called ADC.


I do not understand 'Secondly, it is enough to use just a low pass filter without downsampling?" If you are using the CIC filter it basically includes the down-sampling process. CIC stands for Cascaded Integrator-Comb and have look at its structure. The first order CIC is an accumulator followed by down sampler and a differentiator. † †




zahramoh wrote on Nov 20th, 2020, 9:10am:
I have used a decimation filter after the differentiator as you already mentioned, and the number of data decreased (exp: 1024 data were converted to 128 data by a 8 down sampler). So, I have some questions. Firstly, I was wondering if the sndr improves after the decimation filter? In other words, when I converted the digital data after the dicimation filter to analog signal, it was excelent, but I am not sure about the SNDR improvement.
Secondly, it is enough to use just a low pass filter without downsampling?


4  Design / Mixed-Signal Design / Re: open loop VCO-Based ADC
 on: Nov 20th, 2020, 2:08pm 
Started by zahramoh | Post by polyam
It is always nice to upload clear plots with X/Y axis properly labeled.  first I see the output is settling right at the beginning. Throw a couple of cycles away when you run fft on the output. So, run the sim for a couple of cycle more and run fft and see the SNDR.  



zahramoh wrote on Nov 20th, 2020, 9:22am:
the following picture †indicates the analog output without decimation filter (blue wave ) and with decimation filter (orange wave )


5  Design / Mixed-Signal Design / Re: open loop VCO-Based ADC
 on: Nov 20th, 2020, 9:22am 
Started by zahramoh | Post by zahramoh
the following picture †indicates the analog output without decimation filter (blue wave ) and with decimation filter (orange wave )

6  Design / Mixed-Signal Design / Re: open loop VCO-Based ADC
 on: Nov 20th, 2020, 9:10am 
Started by zahramoh | Post by zahramoh
I have used a decimation filter after the differentiator as you already mentioned, and the number of data decreased (exp: 1024 data were converted to 128 data by a 8 down sampler). So, I have some questions. Firstly, I was wondering if the sndr improves after the decimation filter? In other words, when I converted the digital data after the dicimation filter to analog signal, it was excelent, but I am not sure about the SNDR improvement.
Secondly, it is enough to use just a low pass filter without downsampling?

7  Design / Mixed-Signal Design / Re: open loop VCO-Based ADC
 on: Nov 19th, 2020, 11:36am 
Started by zahramoh | Post by zahramoh
I'm so thankful for your helpful comments. I will apply what you mentioned

8  Design / Mixed-Signal Design / Re: open loop VCO-Based ADC
 on: Nov 18th, 2020, 1:16pm 
Started by zahramoh | Post by polyam
A filter similar to what I attached should do the job.

9  Design / Mixed-Signal Design / Re: open loop VCO-Based ADC
 on: Nov 17th, 2020, 9:53am 
Started by zahramoh | Post by polyam
I am a bit confused about the SNDR you are getting. If you get 45dB SNDR it basically means that you are affected by the non-linearity of the VCO and it contradicts with your statement "almost linear oscillator".
The other thing is using a differentiator. I am assuming that you are using 1-Z^-1 (probably two stages) and that differentiator is essentially a high-pass filter. I would suggest you capture the data and then use a 2nd order decimation filter in Matlab and post-process the data. You need two accumulators, followed by a down-sampling factor of 8 and then two differentiators.
Also, increase the number of FFT point and plot your spectrum in log axis. That way you should be able to see 20dB/dec slop and HD2,HD3 ...

10  Design / Mixed-Signal Design / Re: open loop VCO-Based ADC
 on: Nov 16th, 2020, 8:03am 
Started by zahramoh | Post by zahramoh
Thanks for your response. Your comments were so helpful. However, I have some questions.
The values of my design parameters are:
OSR = 8
BW = 1.5 MHz (BW = Fsampling/(2*OSR))
In the above BW, SNDR and SFDR are 45 dB and 49 dB, respectively. But, SNDR is 70 dB according to theoretical formula of SNDR (SNDR = 6.02*N + 1.73 + 10*log(OSR)). On the other hand, as you already said, SNDR is equal to 66 dB. Do you calculate the SNDR parameter from this formula?
I didnít use low-pass and decimation filters, and I just applied a digital filter as a differentiator. Given that I measured the parameters of the system in the BW of ADC (1.5 MHz), I was wondering if those filters have any effect on the system parameters? If so, what kind of low-pass filter should I use? Do I have to apply it after the differentiator?
Thank you in advance for your time and consideration.

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