Designer’s Guide Community

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Subject	Started by	Replies	Views	Last post
use of small signal resources is not supported?	nus_lin	5	3518	Sep 10^th, 2008, 12:19am By: nus_lin
IF Statements & source-drain symmetry	littlenasboy	1	1716	Sep 8^th, 2008, 5:31am By: Geoffrey_Coram
Hello World AMS program?	joel	10	7151	Sep 6^th, 2008, 10:38pm By: jbdavid
*Help Regular Expressions: /\<[a-z]\w\>/**	neoflash	4	3147	Sep 3^rd, 2008, 8:29am By: jbdavid
Same code but different result?	sprun	2	2149	Sep 3^rd, 2008, 8:10am By: jbdavid
verilog-A model for counter	smarty	2	8140	Aug 28^th, 2008, 8:19pm By: smarty
NODAS...	msdryxon	6	5091	Aug 27^th, 2008, 3:20pm By: jbdavid
instantiating modules in Verilog-A blocks	Pavel	5	7011	Aug 27^th, 2008, 3:10pm By: jbdavid
solving for nonlinear diff. equation in nonlinear oscillator models	Aigneryu	0	1321	Aug 27^th, 2008, 2:41pm By: Aigneryu
Matrix Manipulation	littlenasboy	2	704	Aug 27^th, 2008, 5:32am By: littlenasboy
if statement	sprun	1	1962	Aug 20^th, 2008, 6:36am By: Geoffrey_Coram
Verilog-a modeling under RF simulator	Visjnoe	2	2712	Aug 19^th, 2008, 11:49pm By: Visjnoe
A doubt on verilog-A syntax	sprun	6	5004	Aug 14^th, 2008, 6:38pm By: sprun
Measure delay with sweep in SPICE	Hoody	4	5043	Aug 11^th, 2008, 5:01am By: Geoffrey_Coram
Hidden states for PSS Analysis	emax	2	2151	Aug 6^th, 2008, 9:49am By: jbdavid
How can I get real random number in Verilog-A?	seefree	2	3370	Aug 6^th, 2008, 9:44am By: jbdavid
how to simulate spectreVerilog from command line?	Antara	1	2072	Aug 4^th, 2008, 12:39pm By: jbdavid
to solve differential equations in verilog-a?	msdryxon	1	3484	Jul 26^th, 2008, 10:10am By: Ken Kundert
Verilog-AMS equivalent to VHDL-AMS "ASSERT" and/or "REPORT"?	eemikej	1	2492	Jul 22^nd, 2008, 11:30pm By: jbdavid
Syntax Error when using spectre to simulation verilog-A file.	Julian18	1	1906	Jul 21^st, 2008, 8:57am By: Geoffrey_Coram

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