Designer’s Guide Community

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Subject	Started by	Replies	Views	Last post
pnoise for SC networks with chopper	RSA	1	73	Jun 2^nd, 2020, 9:35pm By: davidshw
Transient Simulation in Cadence Spectre - Max Step vs. Strobe Delay	repah	5	1438	May 28^th, 2020, 2:59am By: repah
Difference between Strobe Period in Transient, Sample/Value Function in Cadence	repah	9	2088	May 11^th, 2020, 11:57pm By: Andrew Beckett
Weird Results with FFT in Cadence Spectrum Assistant / DFT Function	repah	0	455	Apr 30^th, 2020, 12:08pm By: repah
DAC Design and PSS/PAC in Cadence Spectre	repah	3	961	Apr 25^th, 2020, 10:38pm By: Ken Kundert
SNR and ENOB of a DAC in Cadence Spectre	repah	0	556	Apr 19^th, 2020, 7:31pm By: repah
Cadence SFDR and ENOB simulation for DAC/ADC over frequency and input amplitude	repah	2	917	Apr 16^th, 2020, 3:04pm By: repah
INL/DNL of DAC/ADC using Calculator	repah	2	937	Apr 16^th, 2020, 3:00pm By: repah
INL/DNL of DAC using Monte Carlo Statistical Simulation in Cadence Spectre	repah	0	438	Apr 16^th, 2020, 2:56pm By: repah
Spectre convergence problems with comparators and temperature	jsaenznoval	0	445	Apr 11^th, 2020, 8:42am By: jsaenznoval
Sampling Bandwidth vs. Bandwidth in Tracking Mode of a Sample/Track and Hold	repah	3	1040	Apr 6^th, 2020, 5:47pm By: Ken Kundert
IP3 Simulation of a Sample and Hold Circuit in Spectre	repah	3	1374	Mar 29^th, 2020, 12:30pm By: Ken Kundert
Moved: PEX Extraction Issues - Started by: vm511 This Topic has been moved to Physical Verification, Extraction and Analysis by Ken Kundert
Hurry, how to use the netlist-based/spice-based spectrerf simulation.	Jacki	5	1388	Mar 3^rd, 2020, 3:17pm By: Ken Kundert
How to compile kspice as console?	AndrzejB	4	2463	Feb 24^th, 2020, 12:30pm By: mhx
STB vs AC analysis - different result	Andrew94	8	2405	Feb 12^th, 2020, 8:37am By: Frank Wiedmann
caculate Zin of a HF rectifier using ADS	ShiGa	0	50	Feb 4^th, 2020, 12:43am By: ShiGa
pac/pnosie simulation	NvR	1	902	Jan 16^th, 2020, 11:37am By: Ken Kundert
Monte Carlo sims for capacitor mismatch	vm511	1	767	Dec 24^th, 2019, 6:51am By: Andrew Beckett
SystemVerilog Behavioral Simulation in Cadence Virtuoso/AMS/Incisive/Spectre	repah	1	1267	Dec 24^th, 2019, 6:49am By: Andrew Beckett

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