Designer’s Guide Community

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Subject	Started by	Replies	Views	Last post
Passing CDF parameters in a text based testbench	Amblik	7	11086	Feb 24^th, 2014, 11:47am By: Amblik
A problem of the function $random	UUInfini	3	5613	Feb 20^th, 2014, 2:17am By: UUInfini
multiple spectre runs with one netlist	OsDi	4	1347	Feb 20^th, 2014, 12:08am By: OsDi
Bidirectional pin and discipline?	Amblik	0	1360	Feb 9^th, 2014, 5:27am By: Amblik
Spectre problems using absdelay()	spectrallypure	13	3006	Jan 29^th, 2014, 9:31am By: spectrallypure
Supply Sensitivity in a Verilog-AMS testbench	Amblik	12	533	Jan 21^st, 2014, 6:16am By: Amblik
array of nodes	aaron_do	2	2541	Jan 14^th, 2014, 7:19pm By: aaron_do
Annotate DC operating point for verilogA model	Mikay	2	4475	Dec 31^st, 2013, 2:09pm By: Mikay
Track&Hold verilog-a code	ams2015	2	2643	Dec 21^st, 2013, 12:56am By: Ken Kundert
constrain number of bits	aaron_do	2	2446	Nov 14^th, 2013, 8:55pm By: aaron_do
Encrypting verilog-A model in HSPICE	yueguoguo	1	2466	Nov 5^th, 2013, 8:26am By: Geoffrey_Coram
a simple inverter verilogA module in Hspice simulation	xiaota	1	787	Nov 5^th, 2013, 8:25am By: Geoffrey_Coram
LRM on using probes on correlated noise	Balaji Raman	1	1887	Nov 5^th, 2013, 8:19am By: Geoffrey_Coram
which one is mostly preferable in between ?: and if else in verilog design	Kotesh	1	2396	Nov 5^th, 2013, 8:16am By: Geoffrey_Coram
Probes handling in HSPICE	bobp2	2	3242	Nov 5^th, 2013, 8:12am By: Geoffrey_Coram
PLL Modeling at 10GHz	pcardoso73	0	2012	Oct 29^th, 2013, 1:56am By: pcardoso73
problem in getting power information from the given below verilog-AMS code	susona	3	2914	Sep 13^th, 2013, 5:47am By: boe
Verilog-A Phase noise model for RF Mixer or RF Multiplier?	weic	0	2403	Aug 17^th, 2013, 2:34pm By: weic
Reading strings from a file in VerilogA	luxmee	1	7135	Aug 15^th, 2013, 7:38am By: Marq Kole
BIAS current modeling in Verilog-a /Verilog-ams	hronad	2	4483	Aug 15^th, 2013, 6:40am By: Marq Kole

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