Designer’s Guide Community

Pages: 1 2 3

Subject	Started by	Replies	Views	Last post
Modular Bench for characterizing OTA « Pages 1 2 »	avlsi	15	1015	Dec 8^th, 2023, 9:30pm By: avlsi
Start-up failures of a ring oscillator	polyam	1	719	Jun 14^th, 2022, 9:49pm By: Ken Kundert
Accessing simulation parameter in OCEAN	Horror Vacui	3	255	Aug 1^st, 2020, 3:25am By: Andrew Beckett
Noise options when simulating with Spectre and ADE-L	vivkr	1	1016	Dec 5^th, 2019, 4:17pm By: sheldon
how to make sdm based fractional pll's transient simulation more accurate?	lwzunique	3	244	Oct 26^th, 2019, 7:18pm By: lwzunique
Ocean memory management	danmc	1	174	Aug 14^th, 2019, 6:34am By: danmc
Uses of Macro in Verilog-AMS	Gp	2	235	Sep 11^th, 2017, 1:26am By: Gp
dynamic comparator noise measurement.	yvkrishna	10	697	May 20^th, 2017, 9:22pm By: yvkrishna
Simulating noise from slow clocked reset	simsim	0	2551	Feb 7^th, 2017, 1:22pm By: simsim
Transient noise of a vsource component	mtytgat	1	191	Nov 18^th, 2016, 9:54am By: sheldon
EMIR analysis using Cadence's Voltus Fi tool	vroy_92	0	3043	Sep 9^th, 2016, 11:44pm By: vroy_92
Ultrasim warning (CMI-2318)	AMS_ei	0	2094	May 24^th, 2016, 2:51am By: AMS_ei
What can we do with "subckts","instance", "model" and "output" results?	Horror Vacui	1	3088	Feb 22^nd, 2016, 11:45am By: Geoffrey_Coram
ocean post-process of sens output	Horror Vacui	0	117	Feb 2^nd, 2016, 5:53am By: Horror Vacui
How to find the over-all worst-case?	weber8722	2	251	Jun 25^th, 2015, 10:57pm By: sheldon
ADC DNL INL simulation using adc_dnl_8bit	kane	1	181	Apr 21^st, 2015, 11:36pm By: weber8722
adexl conditional specifications	danmc	1	169	Apr 21^st, 2015, 11:34pm By: weber8722
Power spectrum of sinusoid processed with a Hann window has multiple traces?	petitivoire	0	124	Apr 5^th, 2015, 10:20am By: petitivoire
settling time simulation of an op amp	kamela	2	227	Apr 2^nd, 2015, 3:37am By: weber8722
Monte Carlo analysis interpretation in cadence.	VINAY RAO	4	2347	Apr 2^nd, 2015, 3:33am By: weber8722

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