Designer’s Guide Community

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Subject	Started by	Replies	Views	Last post
How to use Calibre to extract parasitical L?	lsfeng	3	6474	Jul 23^rd, 2008, 4:21pm By: htho66
Calibre L extracton	R. Zakai	1	3606	May 7^th, 2008, 4:18pm By: 9patch
Calibre PEX problem with UMC 0.13u design kit	grassflying	1	4842	May 7^th, 2008, 4:16pm By: 9patch
ERC Checking tool for schematics	BWhite	0	1759	May 6^th, 2008, 12:49pm By: BWhite
PADS warnings.. Assura DRC	Faisal	1	3189	Apr 22^nd, 2008, 2:25am By: kazys
Assura LVS unbound pins	vkale	1	3776	Apr 3^rd, 2008, 10:07am By: didac
Ansorf Q3D Extractor	Zezy	0	1946	Feb 25^th, 2008, 3:54am By: Zezy
Star RCXT issue with standard cells	bugmenot	0	2468	Feb 15^th, 2008, 2:39pm By: bugmenot
min. Capsize not settable for Assura RCX	vivkr	2	3140	Feb 13^th, 2008, 10:53pm By: vivkr
input.scs: +8 is an instance of an undefined model	dpx4086	5	7966	Jan 21^st, 2008, 11:37pm By: dpx4086
why some layers missed in the extracted view ?	dpx4086	6	1372	Jan 16^th, 2008, 5:05am By: dpx4086
I need help with Cadence	victorbrian	1	4042	Dec 19^th, 2007, 11:40pm By: ywguo
Analog Corner Analysis: component has no corner	DoYouLinux	1	3028	Dec 19^th, 2007, 9:32pm By: ywguo
RF pad with ESD protection for UMC-0.18um process	DoYouLinux	0	1981	Nov 20^th, 2007, 8:51am By: DoYouLinux
Faraday analog I/O pad: how to connect	DoYouLinux	0	1682	Oct 25^th, 2007, 2:51am By: DoYouLinux
assura back annotate	aaron_do	0	366	Oct 18^th, 2007, 9:05pm By: aaron_do
What are these error from LVS: psub_StampErrorMult	DoYouLinux	2	82	Oct 18^th, 2007, 8:36am By: bernd
What are these error from LVS: psub_StampErrorMult	DoYouLinux	1	2856	Oct 17^th, 2007, 9:06am By: didac
Several "ground" and "Vdd" connections	DoYouLinux	1	60	Oct 16^th, 2007, 9:39am By: ACWWong
Assura LVS unbound pin problem	skylerweaver	2	9186	Oct 10^th, 2007, 6:54am By: didac

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