Issue in Modeling PLL with very High VCO frequency of 3.4GHz

PLL simulation in all inversion regions

NOISE FILTERING using VerilogAMS

Moved: Jitter Measurement using eye diagram in cadence - Started by: nadroit
This Topic has been moved to Circuit Simulators by Forum Administrator

Verilog-A table model

Verilog-A model of cantilever beam

verilogA: Connecting different regulator on same node.

step response analog LPF (RC Low Pass), abrup jump

help for veriloga sample hold circuit convergence problem.

verilogA example code of opamp

Transition filter starting at t=0?

How to use a curve fit function to simulate MEMS transient response

How to get a Gaussian source using Verilog-AMS

Stack Memory verilog program- need help please

Adding parasitic  information into verilog AMS

cds_iprobe function

verilogA: how to print out number with parametric precision?

Is there any way in vams to convert strings to hierarchal references?

Need help with Arithmetic & Logic Unit

Cross statements and simulation speed