Designer’s Guide Community

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Subject	Started by	Replies	Views	Last post
modeling an amplifier in verilogAMS	adecve	2	833	Jan 29^th, 2009, 7:27pm By: RFICDUDE
Moved: Library Manager and verilogams - Started by: wave This Topic has been moved to AMS Simulators by Forum Administrator
Variable capacitor...	Seario	4	1574	Jan 28^th, 2009, 8:57am By: Seario
strobing data to a file using Verilog-A (parameterizing the file)	vivkr	3	4370	Jan 22^nd, 2009, 1:05am By: vivkr
ddx operator implementation	ivan_petkov	2	795	Jan 22^nd, 2009, 12:25am By: ivan_petkov
cross statement	nishant22	2	2300	Jan 21^st, 2009, 7:38am By: nishant22
OSS vs cellview based netlister	wave	4	6205	Jan 20^th, 2009, 5:53pm By: Ken Kundert
wreal bidirectionality - Any solution ?	lusorg	1	2414	Jan 16^th, 2009, 3:08pm By: jbdavid
Moved: Do I need IUS/LDV to do AMS simulation - Started by: Julian18 This Topic has been moved to AMS Simulators by Forum Administrator
AMS simulation run time	k_arkal	6	5266	Jan 2^nd, 2009, 7:59am By: sheldon
why my D-ff always outputs low voltage?	wwwww12345	3	2899	Dec 14^th, 2008, 11:16pm By: wwwww12345
Truly bidirectional ideal transformer in Verilog-A	gmork_0	1	4085	Dec 3^rd, 2008, 5:34am By: Geoffrey_Coram
Simple adder - help!!	vabian	3	3084	Nov 27^th, 2008, 10:46pm By: Ken Kundert
how to model a vccap?	ricky	6	1930	Nov 26^th, 2008, 6:25am By: Peruzzi
Moved: Pionter functionality with Verilog-AMS - Started by: IJnte This Topic has been moved to Analog Functional Verification by Forum Administrator
ESD protection devices models	Dracon	0	1832	Nov 22^nd, 2008, 5:46am By: Dracon
Verilog-AMS in Cadence icfb	ORNITORINCO	4	8954	Nov 21^st, 2008, 2:50pm By: ORNITORINCO
oblem with	Mahavir	1	1857	Nov 12^th, 2008, 9:00am By: jbdavid
modelling using verilog -ams	godfather	3	3015	Nov 11^th, 2008, 4:34am By: Geoffrey_Coram
Electrical Vs Real	gandhi_gaurav	5	4893	Nov 5^th, 2008, 5:17am By: Geoffrey_Coram

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