Designer’s Guide Community

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Subject	Started by	Replies	Views	Last post
controlling the frequency of oscialtor	neuro11	5	3369	May 3^rd, 2013, 8:31am By: raja.cedt
Could you let me know this type of circuit ?	azure_sky	9	5896	May 2^nd, 2013, 5:44pm By: azure_sky
Bandgap Start up	circuit_cook	8	7071	May 1^st, 2013, 7:27pm By: circuit_cook
cmos amplifier	aman gupta	3	2537	Apr 30^th, 2013, 12:37pm By: raja.cedt
feedback topolgy	aman gupta	6	3919	Apr 26^th, 2013, 10:23am By: loose-electron
Moved: transformer modeling with leakage inductance - Started by: hedaye This Topic has been moved to Verilog-AMS by Ken Kundert
DLL design using Maneatis architecture (All phases are not equally spaced ) )	saurabh3488	5	3460	Apr 24^th, 2013, 8:43pm By: loose-electron
DLL questions	Evgenii	6	3563	Apr 22^nd, 2013, 11:05pm By: Evgenii
Precision Analog Transimpedance Gain Control	dannybeckett	1	1582	Apr 22^nd, 2013, 12:35pm By: raja.cedt
How to calculate and simulate impedance	Larry_80	8	1571	Apr 19^th, 2013, 2:03am By: raja.cedt
Design of a 40 MHz pierce oscillator(quartz), steps to follow « Pages 1 2 »	Pictou	20	16626	Apr 16^th, 2013, 11:54pm By: Pictou
FPGA Implementation of Sigma-Delta	iVenky	0	1808	Apr 15^th, 2013, 9:25pm By: iVenky
Common centroid/Interdigitized layout LVS issue	jockeymonto	3	6399	Apr 14^th, 2013, 11:21pm By: jockeymonto
comparator bandwidth	lhlbluesky_lhl	4	4164	Apr 11^th, 2013, 4:56am By: weber8722
Cascaded Current mirror low current	neuro11	7	4839	Apr 3^rd, 2013, 7:15pm By: sheldon
Determine poles , zeros,UGBW and Slew Rate of two stage folded cascod	HaAf	1	1796	Apr 2^nd, 2013, 8:36am By: indysjl
Amplifier Gain	neuro11	6	3717	Mar 28^th, 2013, 1:46am By: Lex
Why Vth decrease with larger channel length in modern CMOS?	neoflash	1	2069	Mar 27^th, 2013, 12:45am By: raja.cedt
properties of stacked mos device « Pages 1 2 »	yvkrishna	23	955	Mar 23^rd, 2013, 1:08pm By: threepwood
1/f noise- the DC value	iVenky	4	4168	Mar 23^rd, 2013, 11:40am By: Horror Vacui

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