Designer’s Guide Community

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Subject	Started by	Replies	Views	Last post
how to generate ibis version 5.0 models	phani	0	2009	Aug 27^th, 2009, 2:23am By: phani
VCDL Verilog-A/AMS Model	Ahmed Nassar	1	4006	Jul 19^th, 2009, 6:07am By: Ahmed Nassar
Frequency Resolution of a PLL is bound by timescale of VerilogAMS - advice?	Alexander E�wein	1	2988	Jul 16^th, 2009, 5:58pm By: jbdavid
Simulink	Habib Ullah	0	1830	Jul 14^th, 2009, 8:43am By: Habib Ullah
LDO modeling	chouba	2	5110	Jul 1^st, 2009, 9:11pm By: Peruzzi
modelling switched cap integrator in MATLAB	manodipan	3	4535	Jul 1^st, 2009, 3:45am By: pancho_hideboo
variable capacitor linked to an RC circuit	Seario	1	3158	Apr 24^th, 2009, 3:04pm By: Ken Kundert
PLL noise modeling	tea	0	2022	Mar 27^th, 2009, 9:12am By: tea
PLL o/p phase noise plot	trond	7	1655	Mar 18^th, 2009, 5:59am By: emad
VCO behavior modeling	bandpass	2	5384	Feb 23^rd, 2009, 4:39am By: bandpass
verilogA modeling advice request	Dan Clement	4	4734	Feb 20^th, 2009, 10:36pm By: Andrew Beckett
voltage limited current controlled current source (cccs)	Ari	1	3185	Feb 16^th, 2009, 3:27pm By: Peruzzi
Transformer model (Coeff of coupling)	rajdeep	0	2314	Jan 21^st, 2009, 6:21am By: rajdeep
Modelling of frequency-dependent resistor (ferrit choke)	Berti	2	5100	Jan 6^th, 2009, 6:49am By: Berti
Model for Average current consumption in Verilog	Sinner	5	6528	Dec 24^th, 2008, 3:07am By: rajdeep
AMS model for a CMOS switch	k_arkal	2	4203	Dec 16^th, 2008, 10:40pm By: Ken Kundert
Time-domain jitter with flicker noise in veriloga	weber8722	2	27360	Oct 7^th, 2008, 7:13am By: weber8722
Can any body give verilog-A code for PWM switch?	ADI	1	5376	Sep 21^st, 2008, 2:15pm By: Jess Chen
How to make a ideal ota(Gota, Rout) ?	vence	0	2130	Sep 10^th, 2008, 6:49pm By: vence
comparator modelling - error during simulation	Pavel	6	5690	Aug 27^th, 2008, 1:19am By: jbdavid

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