Designer’s Guide Community

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Subject	Started by	Replies	Views	Last post
references on digital calibration of ADCs	vivkr	1	2089	Feb 10^th, 2006, 1:45pm By: panditabupesh
can I mathematically mix CT and DT systems?	trond	3	3284	Feb 8^th, 2006, 11:50am By: Jess Chen
help about input filter of adc	jeffyan	1	1159	Feb 7^th, 2006, 7:46pm By: venky
Ideal switch with piece wise linear resistance.	venky	0	1910	Feb 7^th, 2006, 7:29pm By: venky
question on sigma-delta FM	trond	2	736	Jan 23^rd, 2006, 2:06am By: trond
Unit gaun Buffer ( with different Commom mode)	mitchell	0	1969	Jan 18^th, 2006, 6:45am By: mitchell
Simulating high-resolution sample-and-hold	vivkr	9	1862	Jan 14^th, 2006, 12:56am By: vivkr
DNL & INL in code density test	steven	2	4038	Jan 10^th, 2006, 10:26am By: steven
MIDAS simulation	c.h.zheng	1	2314	Jan 10^th, 2006, 3:03am By: ywguo
voltage reference buffer for pipelined ADC	ywguo	11	2021	Jan 9^th, 2006, 3:44pm By: huber
analog signal in ADC	steven	4	4023	Jan 7^th, 2006, 9:23am By: steven
buffer bandwidth in sample-and-hold	steven	3	3521	Jan 4^th, 2006, 1:13pm By: Paul
high linearity sampling without bootstrapping	vivkr	3	3673	Dec 30^th, 2005, 3:02am By: sheldon
differential clocks for pipelined ADCs	vivkr	2	57	Dec 28^th, 2005, 12:42am By: vivkr
ask:sigma-delta modulator phd paper	c.h.zheng	1	2209	Dec 27^th, 2005, 10:49am By: Paul
highly linear vco	trond	1	2021	Dec 20^th, 2005, 11:33pm By: ywguo
Current bias circuit design	gogomi	4	4346	Dec 18^th, 2005, 9:01am By: kadison
Help on Pipeline ADC design	forest_rain	6	1209	Dec 11^th, 2005, 11:34pm By: vivkr
switch capacitor integrator simulation	c.h.zheng	2	3098	Dec 9^th, 2005, 11:23pm By: c.h.zheng
VCO Duty Cycle	bhupendra (Guest)	2	3005	Dec 3^rd, 2005, 7:47am By: juddy

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