Designer’s Guide Community

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Subject	Started by	Replies	Views	Last post
Links to the Verilog-A models of nonlinear devices	SVT	11	25354	Nov 3^rd, 2011, 12:52pm By: Geoffrey_Coram
VERILOG-A and imaginary numbers and functions	T-4444	2	6662	Oct 18^th, 2011, 10:04pm By: T-4444
accuracy of PSP and BSIM model in the Accumulation mode	aaron_do	2	6669	Sep 28^th, 2011, 5:14pm By: aaron_do
VHDL-AMS VBIC model?	the_pd	2	4436	Sep 19^th, 2011, 7:20am By: Geoffrey_Coram
TSMC 90nm/65nm/45nm/28nm Noise Factor	neoflash	0	4262	Sep 10^th, 2011, 9:55pm By: neoflash
IBM45nm (SOI ) technology Gate resistance problem	nadroit	1	3838	Jul 20^th, 2011, 5:36am By: Geoffrey_Coram
PSP 101.3 Verilog-A Model Problem	Mihir Mudholkar	5	8062	Jul 12^th, 2011, 9:33am By: Geoffrey_Coram
Does TSMC Spice model include impacted ionization effect?	neoflash	5	8805	Feb 1^st, 2011, 3:37pm By: neoflash
How are Vtlin and Vtsat extracted from simulation results	modelman	3	1250	Feb 1^st, 2011, 3:24pm By: Mooraka
Information about Epitaxial layer	DoYouLinux	3	6089	Jan 31^st, 2011, 6:58pm By: modelman
Capacitance based model vs charge based model	kumar.g	4	6916	Jan 20^th, 2011, 6:45am By: c1000
Self-heating simulation	McSim	9	4743	Dec 27^th, 2010, 3:11am By: McSim
How are PDK's made?	somisetty	4	5901	Dec 1^st, 2010, 12:34am By: haykp
about breakdown voltage	rajesh14	2	5146	Nov 30^th, 2010, 7:11am By: Colbhaidh
How foundries make low vt mosfet	rfmems	5	8680	Nov 30^th, 2010, 6:48am By: Colbhaidh
Re: Snapback in LDMOS	ujwal	0	3622	Oct 11^th, 2010, 2:45am By: ujwal
Spectre BSIM3(V3.2) Model Questions	pink_panther	2	1063	Sep 16^th, 2010, 6:32am By: pink_panther
pMOS gate capacitance	Godfrey (Ex Member)	4	6656	Sep 3^rd, 2010, 1:09am By: Lex
poly resistor vs nwell for 1/f noise	rfcooltools.com	3	2496	Aug 18^th, 2010, 4:04am By: hande.vinayak
viarations of poly resisitor	kennycs	5	7581	Aug 7^th, 2010, 12:48pm By: love_analog

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