Designer’s Guide Community

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Subject	Started by	Replies	Views	Last post
Error in simulating a VCO in veriloga	moisiad	2	3997	Sep 29^th, 2005, 8:37pm By: Ken Kundert
reg : learning of Verilog-AMS	Jyoti shankar sen (Guest)	4	4666	Sep 16^th, 2005, 11:07am By: Geoffrey_Coram
how to model a charge pump	dingforrest	3	3660	Sep 13^th, 2005, 5:37pm By: dingforrest
Question about "$fclosed"	tumeda	10	8180	Sep 9^th, 2005, 1:38am By: tumeda
how to overwrite a file in Veriloga?	tumeda	6	6851	Sep 2^nd, 2005, 10:05am By: tumeda
PAC of a VCO and a few other questions « Pages 1 2 »	trond	27	4799	Aug 30^th, 2005, 9:03am By: Eugene
Current switching « Pages 1 2 »	noreng	22	16584	Aug 26^th, 2005, 7:56am By: noreng
gmin	king	1	2293	Aug 26^th, 2005, 5:33am By: Geoffrey_Coram
complex signal processing	trond	1	2164	Aug 26^th, 2005, 4:35am By: Geoffrey_Coram
debugging in Verilog AMS	king	3	4490	Aug 22^nd, 2005, 5:27am By: Geoffrey_Coram
Question about MUX	MokoKoya	4	5389	Aug 18^th, 2005, 10:29am By: Geoffrey_Coram
diode modeling	Zorro	3	837	Aug 18^th, 2005, 10:25am By: Geoffrey_Coram
VerilogA Model of the Schottky-Diode	mahboul	1	4729	Aug 18^th, 2005, 10:14am By: Geoffrey_Coram
VCO model from the Verilog-AMS section	trond	1	2529	Aug 11^th, 2005, 9:29pm By: Andrew Beckett
Separating real from imaginary	jefkat	5	5227	Aug 8^th, 2005, 8:33am By: jefkat
discipline error in Verilog-AMS	coldfire1029	1	662	Jul 22^nd, 2005, 12:41pm By: Geoffrey_Coram
Current sense	noreng	6	6475	Jul 20^th, 2005, 4:21am By: Geoffrey_Coram
how to use wreal?	Monia (Guest)	1	3705	Jul 14^th, 2005, 7:36am By: Ken Kundert
want to generate burst mode signal	beabroad1	0	1768	Jul 9^th, 2005, 7:31pm By: beabroad1
How to force rise/fall time?	Tommy	2	3152	Jun 27^th, 2005, 11:22pm By: Andrew Beckett

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